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160
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1
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2 /*
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3 * Copyright (C) Igor Sysoev
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4 */
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5
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6
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7 #include <ngx_config.h>
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8 #include <ngx_core.h>
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9
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10
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11 #if (( __i386__ || __amd64__ ) && ( __GNUC__ || __INTEL_COMPILER ))
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12
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13
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14 static ngx_inline void ngx_cpuid(uint32_t i, uint32_t *buf);
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15
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16
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166
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17 #if ( __i386__ )
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18
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19 static ngx_inline void
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20 ngx_cpuid(uint32_t i, uint32_t *buf)
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21 {
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22
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23 /*
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24 * we could not use %ebx as output parameter if gcc builds PIC,
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25 * and we could not save %ebx on stack, because %esp is used,
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26 * when the -fomit-frame-pointer optimization is specified.
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27 */
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28
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29 __asm__ (
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30
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31 " mov %%ebx, %%esi; "
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32
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33 " cpuid; "
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200
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34 " mov %%eax, (%1); "
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35 " mov %%ebx, 4(%1); "
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36 " mov %%edx, 8(%1); "
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37 " mov %%ecx, 12(%1); "
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166
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38
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39 " mov %%esi, %%ebx; "
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40
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200
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41 : : "a" (i), "D" (buf) : "ecx", "edx", "esi", "memory" );
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166
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42 }
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43
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44
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45 #else /* __amd64__ */
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46
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47
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160
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48 static ngx_inline void
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49 ngx_cpuid(uint32_t i, uint32_t *buf)
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50 {
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51 uint32_t eax, ebx, ecx, edx;
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52
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53 __asm__ (
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54
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55 "cpuid"
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56
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57 : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) : "a" (i) );
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58
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59 buf[0] = eax;
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60 buf[1] = ebx;
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61 buf[2] = edx;
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62 buf[3] = ecx;
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63 }
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64
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65
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166
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66 #endif
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67
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68
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160
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69 /* auto detect the L2 cache line size of modern and widespread CPUs */
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70
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71 void
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72 ngx_cpuinfo(void)
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73 {
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74 u_char *vendor;
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468
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75 uint32_t vbuf[5], cpu[4], model;
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160
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76
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77 vbuf[0] = 0;
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78 vbuf[1] = 0;
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79 vbuf[2] = 0;
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80 vbuf[3] = 0;
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81 vbuf[4] = 0;
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82
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83 ngx_cpuid(0, vbuf);
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84
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85 vendor = (u_char *) &vbuf[1];
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86
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87 if (vbuf[0] == 0) {
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88 return;
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89 }
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90
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91 ngx_cpuid(1, cpu);
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92
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93 if (ngx_strcmp(vendor, "GenuineIntel") == 0) {
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94
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364
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95 switch ((cpu[0] & 0xf00) >> 8) {
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160
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96
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97 /* Pentium */
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98 case 5:
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364
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99 ngx_cacheline_size = 32;
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100 break;
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101
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160
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102 /* Pentium Pro, II, III */
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103 case 6:
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104 ngx_cacheline_size = 32;
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364
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105
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468
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106 model = ((cpu[0] & 0xf0000) >> 8) | (cpu[0] & 0xf0);
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107
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108 if (model >= 0xd0) {
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109 /* Intel Core, Core 2, Atom */
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364
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110 ngx_cacheline_size = 64;
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111 }
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112
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160
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113 break;
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114
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115 /*
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116 * Pentium 4, although its cache line size is 64 bytes,
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117 * it prefetches up to two cache lines during memory read
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118 */
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119 case 15:
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120 ngx_cacheline_size = 128;
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121 break;
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122 }
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123
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124 } else if (ngx_strcmp(vendor, "AuthenticAMD") == 0) {
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125 ngx_cacheline_size = 64;
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126 }
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127 }
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128
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129 #else
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130
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131
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132 void
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133 ngx_cpuinfo(void)
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134 {
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135 }
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136
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137
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138 #endif
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