Mercurial > hg > nginx-vendor-current

comparison src/os/unix/ngx_gcc_atomic_ppc.h @ 270:6eb1e38f0f1f NGINX_0_5_5

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
nginx 0.5.5 *) Change: the -v switch does not show compiler information any more. *) Feature: the -V switch. *) Feature: the "worker_rlimit_core" directive supports size in K, M, and G. *) Bugfix: the nginx.pm module now could be installed by an unprivileged user. *) Bugfix: a segmentation fault might occur if the $r->request_body or $r->request_body_file methods were used. *) Bugfix: the ppc platform specific bugs.
author Igor Sysoev <http://sysoev.ru>
date Sun, 24 Dec 2006 00:00:00 +0300
parents 73e8476f9142
children d0f7a625f27c
comparison
equal deleted inserted replaced
269:aa9c0062124d 270:6eb1e38f0f1f
13 * 13 *
14 * The "b" means that the base registers can be used only, i.e. 14 * The "b" means that the base registers can be used only, i.e.
15 * any register except r0. The r0 register always has a zero value and 15 * any register except r0. The r0 register always has a zero value and
16 * could not be used in "addi r0, r0, 1". 16 * could not be used in "addi r0, r0, 1".
17 * The "=&b" means that no input registers can be used. 17 * The "=&b" means that no input registers can be used.
18 *
19 * "sync" read and write barriers
20 * "isync" read barrier, is faster than "sync"
21 * "eieio" write barrier, is faster than "sync"
22 * "lwsync" write barrier, is faster than "eieio" on ppc64
18 */ 23 */
24
25 #if (NGX_PTR_SIZE == 8)
19 26
20 static ngx_inline ngx_atomic_uint_t 27 static ngx_inline ngx_atomic_uint_t
21 ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old, 28 ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old,
22 ngx_atomic_uint_t set) 29 ngx_atomic_uint_t set)
23 { 30 {
24 ngx_atomic_uint_t res, temp; 31 ngx_atomic_uint_t res, temp;
25 32
26 __asm__ volatile ( 33 __asm__ volatile (
27 34
28 " li %0, 0 \n" /* preset "0" to "res" */ 35 " li %0, 0 \n" /* preset "0" to "res" */
29 " lwarx %1, 0, %2 \n" /* load from [lock] into "temp" */ 36 " lwsync \n" /* write barrier */
37 "1: \n"
38 " ldarx %1, 0, %2 \n" /* load from [lock] into "temp" */
30 /* and store reservation */ 39 /* and store reservation */
31 " cmpw %1, %3 \n" /* compare "temp" and "old" */ 40 " cmpd %1, %3 \n" /* compare "temp" and "old" */
32 " bne- 1f \n" /* not equal */ 41 " bne- 2f \n" /* not equal */
33 " stwcx. %4, 0, %2 \n" /* store "set" into [lock] if reservation */ 42 " stdcx. %4, 0, %2 \n" /* store "set" into [lock] if reservation */
34 /* is not cleared */ 43 /* is not cleared */
35 " bne- 1f \n" /* the reservation was cleared */ 44 " bne- 1b \n" /* the reservation was cleared */
45 " isync \n" /* read barrier */
36 " li %0, 1 \n" /* set "1" to "res" */ 46 " li %0, 1 \n" /* set "1" to "res" */
37 "1: \n" 47 "2: \n"
38 48
39 : "=&b" (res), "=&b" (temp) 49 : "=&b" (res), "=&b" (temp)
40 : "b" (lock), "b" (old), "b" (set) 50 : "b" (lock), "b" (old), "b" (set)
41 : "cc", "memory"); 51 : "cc", "memory");
42 52
49 { 59 {
50 ngx_atomic_uint_t res, temp; 60 ngx_atomic_uint_t res, temp;
51 61
52 __asm__ volatile ( 62 __asm__ volatile (
53 63
54 "1: lwarx %0, 0, %2 \n" /* load from [value] into "res" */ 64 " lwsync \n" /* write barrier */
65 "1: ldarx %0, 0, %2 \n" /* load from [value] into "res" */
55 /* and store reservation */ 66 /* and store reservation */
56 " add %1, %0, %3 \n" /* "res" + "add" store in "temp" */ 67 " add %1, %0, %3 \n" /* "res" + "add" store in "temp" */
57 " stwcx. %1, 0, %2 \n" /* store "temp" into [value] if reservation */ 68 " stdcx. %1, 0, %2 \n" /* store "temp" into [value] if reservation */
58 /* is not cleared */ 69 /* is not cleared */
59 " bne- 1b \n" /* try again if reservation was cleared */ 70 " bne- 1b \n" /* try again if reservation was cleared */
71 " isync \n" /* read barrier */
60 72
61 : "=&b" (res), "=&b" (temp) 73 : "=&b" (res), "=&b" (temp)
62 : "b" (value), "b" (add) 74 : "b" (value), "b" (add)
63 : "cc", "memory"); 75 : "cc", "memory");
64 76
65 return res; 77 return res;
66 } 78 }
67 79
68 80
69 #if (NGX_SMP) 81 #if (NGX_SMP)
70 #define ngx_memory_barrier() __asm__ volatile ("sync\n" ::: "memory") 82 #define ngx_memory_barrier() \
83 __asm__ volatile ("isync \n lwsync \n" ::: "memory")
71 #else 84 #else
72 #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory") 85 #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory")
73 #endif 86 #endif
74 87
88 #else
89
90 static ngx_inline ngx_atomic_uint_t
91 ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old,
92 ngx_atomic_uint_t set)
93 {
94 ngx_atomic_uint_t res, temp;
95
96 __asm__ volatile (
97
98 " li %0, 0 \n" /* preset "0" to "res" */
99 " eieio \n" /* write barrier */
100 "1: \n"
101 " lwarx %1, 0, %2 \n" /* load from [lock] into "temp" */
102 /* and store reservation */
103 " cmpw %1, %3 \n" /* compare "temp" and "old" */
104 " bne- 2f \n" /* not equal */
105 " stwcx. %4, 0, %2 \n" /* store "set" into [lock] if reservation */
106 /* is not cleared */
107 " bne- 1b \n" /* the reservation was cleared */
108 " isync \n" /* read barrier */
109 " li %0, 1 \n" /* set "1" to "res" */
110 "2: \n"
111
112 : "=&b" (res), "=&b" (temp)
113 : "b" (lock), "b" (old), "b" (set)
114 : "cc", "memory");
115
116 return res;
117 }
118
119
120 static ngx_inline ngx_atomic_int_t
121 ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add)
122 {
123 ngx_atomic_uint_t res, temp;
124
125 __asm__ volatile (
126
127 " eieio \n" /* write barrier */
128 "1: lwarx %0, 0, %2 \n" /* load from [value] into "res" */
129 /* and store reservation */
130 " add %1, %0, %3 \n" /* "res" + "add" store in "temp" */
131 " stwcx. %1, 0, %2 \n" /* store "temp" into [value] if reservation */
132 /* is not cleared */
133 " bne- 1b \n" /* try again if reservation was cleared */
134 " isync \n" /* read barrier */
135
136 : "=&b" (res), "=&b" (temp)
137 : "b" (value), "b" (add)
138 : "cc", "memory");
139
140 return res;
141 }
142
143
144 #if (NGX_SMP)
145 #define ngx_memory_barrier() \
146 __asm__ volatile ("isync \n eieio \n" ::: "memory")
147 #else
148 #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory")
149 #endif
150
151 #endif
152
153
75 #define ngx_cpu_pause() 154 #define ngx_cpu_pause()