Mercurial > hg > nginx-vendor-current
view src/os/unix/ngx_gcc_atomic_amd64.h @ 342:4276c2f1f434 NGINX_0_6_15
nginx 0.6.15
*) Feature: cygwin compatibility.
Thanks to Vladimir Kutakov.
*) Feature: the "merge_slashes" directive.
*) Feature: the "gzip_vary" directive.
*) Feature: the "server_tokens" directive.
*) Bugfix: nginx did not unescape URI in the "include" SSI command.
*) Bugfix: the segmentation fault was occurred on start or while
reconfiguration if variable was used in the "charset" or
"source_charset" directives.
*) Bugfix: nginx returned the 400 response on requests like
"GET http://www.domain.com HTTP/1.0".
Thanks to James Oakley.
*) Bugfix: if request with request body was redirected using the
"error_page" directive, then nginx tried to read the request body
again; bug appeared in 0.6.7.
*) Bugfix: a segmentation fault occurred in worker process if no
server_name was explicitly defined for server processing request;
bug appeared in 0.6.7.
author | Igor Sysoev <http://sysoev.ru> |
---|---|
date | Mon, 22 Oct 2007 00:00:00 +0400 |
parents | 052a7b1d40e5 |
children | d0f7a625f27c |
line wrap: on
line source
/* * Copyright (C) Igor Sysoev */ #if (NGX_SMP) #define NGX_SMP_LOCK "lock;" #else #define NGX_SMP_LOCK #endif /* * "cmpxchgq r, [m]": * * if (rax == [m]) { * zf = 1; * [m] = r; * } else { * zf = 0; * rax = [m]; * } * * * The "r" is any register, %rax (%r0) - %r16. * The "=a" and "a" are the %rax register. * Although we can return result in any register, we use "a" because it is * used in cmpxchgq anyway. The result is actually in %al but not in $rax, * however as the code is inlined gcc can test %al as well as %rax. * * The "cc" means that flags were changed. */ static ngx_inline ngx_atomic_uint_t ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old, ngx_atomic_uint_t set) { u_char res; __asm__ volatile ( NGX_SMP_LOCK " cmpxchgq %3, %1; " " sete %0; " : "=a" (res) : "m" (*lock), "a" (old), "r" (set) : "cc", "memory"); return res; } /* * "xaddq r, [m]": * * temp = [m]; * [m] += r; * r = temp; * * * The "+r" is any register, %rax (%r0) - %r16. * The "cc" means that flags were changed. */ static ngx_inline ngx_atomic_int_t ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add) { __asm__ volatile ( NGX_SMP_LOCK " xaddq %0, %1; " : "+r" (add) : "m" (*value) : "cc", "memory"); return add; } #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory") #define ngx_cpu_pause() __asm__ ("pause")