Mercurial > hg > nginx-vendor-current
view src/os/unix/ngx_gcc_atomic_amd64.h @ 480:549994537f15 NGINX_0_7_52
nginx 0.7.52
*) Feature: the first native Windows binary release.
*) Bugfix: in processing HEAD method while caching.
*) Bugfix: in processing the "If-Modified-Since", "If-Range", etc.
client request header lines while caching.
*) Bugfix: now the "Set-Cookie" and "P3P" header lines are hidden in
cacheable responses.
*) Bugfix: if nginx was built with the ngx_http_perl_module and with a
perl which supports threads, then during a master process exit the
message "panic: MUTEX_LOCK" might be issued.
*) Bugfix: nginx could not be built --without-http-cache; the bug had
appeared in 0.7.48.
*) Bugfix: nginx could not be built on platforms different from i386,
amd64, sparc, and ppc; the bug had appeared in 0.7.42.
author | Igor Sysoev <http://sysoev.ru> |
---|---|
date | Mon, 20 Apr 2009 00:00:00 +0400 |
parents | 052a7b1d40e5 |
children | d0f7a625f27c |
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/* * Copyright (C) Igor Sysoev */ #if (NGX_SMP) #define NGX_SMP_LOCK "lock;" #else #define NGX_SMP_LOCK #endif /* * "cmpxchgq r, [m]": * * if (rax == [m]) { * zf = 1; * [m] = r; * } else { * zf = 0; * rax = [m]; * } * * * The "r" is any register, %rax (%r0) - %r16. * The "=a" and "a" are the %rax register. * Although we can return result in any register, we use "a" because it is * used in cmpxchgq anyway. The result is actually in %al but not in $rax, * however as the code is inlined gcc can test %al as well as %rax. * * The "cc" means that flags were changed. */ static ngx_inline ngx_atomic_uint_t ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old, ngx_atomic_uint_t set) { u_char res; __asm__ volatile ( NGX_SMP_LOCK " cmpxchgq %3, %1; " " sete %0; " : "=a" (res) : "m" (*lock), "a" (old), "r" (set) : "cc", "memory"); return res; } /* * "xaddq r, [m]": * * temp = [m]; * [m] += r; * r = temp; * * * The "+r" is any register, %rax (%r0) - %r16. * The "cc" means that flags were changed. */ static ngx_inline ngx_atomic_int_t ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add) { __asm__ volatile ( NGX_SMP_LOCK " xaddq %0, %1; " : "+r" (add) : "m" (*value) : "cc", "memory"); return add; } #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory") #define ngx_cpu_pause() __asm__ ("pause")