Mercurial > hg > nginx-vendor-current
view src/os/unix/ngx_gcc_atomic_amd64.h @ 358:9121a0a91f47 NGINX_0_6_23
nginx 0.6.23
*) Change: the "off" parameter in the "ssl_session_cache" directive;
now this is default parameter.
*) Change: the "open_file_cache_retest" directive was renamed to the
"open_file_cache_valid".
*) Feature: the "open_file_cache_min_uses" directive.
*) Feature: the ngx_http_gzip_static_module.
*) Feature: the "gzip_disable" directive.
*) Feature: the "memcached_pass" directive may be used inside the "if"
block.
*) Bugfix: a segmentation fault occurred in worker process, if the
"memcached_pass" and "if" directives were used in the same location.
*) Bugfix: if a "satisfy_any on" directive was used and not all access
and auth modules directives were set, then other given access and
auth directives were not tested;
*) Bugfix: regex parameters in a "valid_referers" directive were not
inherited from previous level.
*) Bugfix: a "post_action" directive did run if a request was completed
with 499 status code.
*) Bugfix: optimization of 16K buffer usage in a SSL connection.
Thanks to Ben Maurer.
*) Bugfix: the STARTTLS in SMTP mode did not work.
Thanks to Oleg Motienko.
*) Bugfix: in HTTPS mode requests might fail with the "bad write retry"
error; bug appeared in 0.5.13.
author | Igor Sysoev <http://sysoev.ru> |
---|---|
date | Thu, 27 Dec 2007 00:00:00 +0300 |
parents | 052a7b1d40e5 |
children | d0f7a625f27c |
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/* * Copyright (C) Igor Sysoev */ #if (NGX_SMP) #define NGX_SMP_LOCK "lock;" #else #define NGX_SMP_LOCK #endif /* * "cmpxchgq r, [m]": * * if (rax == [m]) { * zf = 1; * [m] = r; * } else { * zf = 0; * rax = [m]; * } * * * The "r" is any register, %rax (%r0) - %r16. * The "=a" and "a" are the %rax register. * Although we can return result in any register, we use "a" because it is * used in cmpxchgq anyway. The result is actually in %al but not in $rax, * however as the code is inlined gcc can test %al as well as %rax. * * The "cc" means that flags were changed. */ static ngx_inline ngx_atomic_uint_t ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old, ngx_atomic_uint_t set) { u_char res; __asm__ volatile ( NGX_SMP_LOCK " cmpxchgq %3, %1; " " sete %0; " : "=a" (res) : "m" (*lock), "a" (old), "r" (set) : "cc", "memory"); return res; } /* * "xaddq r, [m]": * * temp = [m]; * [m] += r; * r = temp; * * * The "+r" is any register, %rax (%r0) - %r16. * The "cc" means that flags were changed. */ static ngx_inline ngx_atomic_int_t ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add) { __asm__ volatile ( NGX_SMP_LOCK " xaddq %0, %1; " : "+r" (add) : "m" (*value) : "cc", "memory"); return add; } #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory") #define ngx_cpu_pause() __asm__ ("pause")