Mercurial > hg > nginx-quic
annotate src/os/unix/ngx_gcc_atomic_ppc.h @ 935:db8e718447f1
use light-weight sync on ppc64
author | Igor Sysoev <igor@sysoev.ru> |
---|---|
date | Tue, 19 Dec 2006 15:23:20 +0000 |
parents | 4745e72044fb |
children | fc1358d3d23a |
rev | line source |
---|---|
561 | 1 |
2 /* | |
3 * Copyright (C) Igor Sysoev | |
4 */ | |
5 | |
6 | |
7 /* | |
8 * The ppc assembler treats ";" as comment, so we have to use "\n". | |
9 * The minus in "bne-" is a hint for the branch prediction unit that | |
10 * this branch is unlikely to be taken. | |
11 * The "1b" means the nearest backward label "1" and the "1f" means | |
12 * the nearest forward label "1". | |
577 | 13 * |
561 | 14 * The "b" means that the base registers can be used only, i.e. |
15 * any register except r0. The r0 register always has a zero value and | |
16 * could not be used in "addi r0, r0, 1". | |
17 * The "=&b" means that no input registers can be used. | |
18 */ | |
19 | |
934
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
20 #if (NGX_PTR_SIZE == 8) |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
21 |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
22 static ngx_inline ngx_atomic_uint_t |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
23 ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old, |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
24 ngx_atomic_uint_t set) |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
25 { |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
26 ngx_atomic_uint_t res, temp; |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
27 |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
28 __asm__ volatile ( |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
29 |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
30 " li %0, 0 \n" /* preset "0" to "res" */ |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
31 " ldarx %1, 0, %2 \n" /* load from [lock] into "temp" */ |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
32 /* and store reservation */ |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
33 " cmpd %1, %3 \n" /* compare "temp" and "old" */ |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
34 " bne- 1f \n" /* not equal */ |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
35 " stdcx. %4, 0, %2 \n" /* store "set" into [lock] if reservation */ |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
36 /* is not cleared */ |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
37 " bne- 1f \n" /* the reservation was cleared */ |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
38 " li %0, 1 \n" /* set "1" to "res" */ |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
39 "1: \n" |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
40 |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
41 : "=&b" (res), "=&b" (temp) |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
42 : "b" (lock), "b" (old), "b" (set) |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
43 : "cc", "memory"); |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
44 |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
45 return res; |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
46 } |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
47 |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
48 |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
49 static ngx_inline ngx_atomic_int_t |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
50 ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add) |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
51 { |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
52 ngx_atomic_uint_t res, temp; |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
53 |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
54 __asm__ volatile ( |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
55 |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
56 "1: ldarx %0, 0, %2 \n" /* load from [value] into "res" */ |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
57 /* and store reservation */ |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
58 " add %1, %0, %3 \n" /* "res" + "add" store in "temp" */ |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
59 " stdcx. %1, 0, %2 \n" /* store "temp" into [value] if reservation */ |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
60 /* is not cleared */ |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
61 " bne- 1b \n" /* try again if reservation was cleared */ |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
62 |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
63 : "=&b" (res), "=&b" (temp) |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
64 : "b" (value), "b" (add) |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
65 : "cc", "memory"); |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
66 |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
67 return res; |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
68 } |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
69 |
935
db8e718447f1
use light-weight sync on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
934
diff
changeset
|
70 |
db8e718447f1
use light-weight sync on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
934
diff
changeset
|
71 #if (NGX_SMP) |
db8e718447f1
use light-weight sync on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
934
diff
changeset
|
72 #define ngx_memory_barrier() __asm__ volatile ("lwsync\n" ::: "memory") |
db8e718447f1
use light-weight sync on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
934
diff
changeset
|
73 #else |
db8e718447f1
use light-weight sync on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
934
diff
changeset
|
74 #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory") |
db8e718447f1
use light-weight sync on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
934
diff
changeset
|
75 #endif |
db8e718447f1
use light-weight sync on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
934
diff
changeset
|
76 |
934
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
77 #else |
4745e72044fb
fix atomic operations on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
611
diff
changeset
|
78 |
561 | 79 static ngx_inline ngx_atomic_uint_t |
80 ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old, | |
81 ngx_atomic_uint_t set) | |
82 { | |
83 ngx_atomic_uint_t res, temp; | |
84 | |
85 __asm__ volatile ( | |
86 | |
87 " li %0, 0 \n" /* preset "0" to "res" */ | |
88 " lwarx %1, 0, %2 \n" /* load from [lock] into "temp" */ | |
89 /* and store reservation */ | |
90 " cmpw %1, %3 \n" /* compare "temp" and "old" */ | |
91 " bne- 1f \n" /* not equal */ | |
92 " stwcx. %4, 0, %2 \n" /* store "set" into [lock] if reservation */ | |
93 /* is not cleared */ | |
94 " bne- 1f \n" /* the reservation was cleared */ | |
95 " li %0, 1 \n" /* set "1" to "res" */ | |
96 "1: \n" | |
97 | |
98 : "=&b" (res), "=&b" (temp) | |
99 : "b" (lock), "b" (old), "b" (set) | |
100 : "cc", "memory"); | |
101 | |
102 return res; | |
103 } | |
104 | |
105 | |
106 static ngx_inline ngx_atomic_int_t | |
107 ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add) | |
108 { | |
109 ngx_atomic_uint_t res, temp; | |
110 | |
111 __asm__ volatile ( | |
112 | |
113 "1: lwarx %0, 0, %2 \n" /* load from [value] into "res" */ | |
114 /* and store reservation */ | |
115 " add %1, %0, %3 \n" /* "res" + "add" store in "temp" */ | |
116 " stwcx. %1, 0, %2 \n" /* store "temp" into [value] if reservation */ | |
117 /* is not cleared */ | |
118 " bne- 1b \n" /* try again if reservation was cleared */ | |
119 | |
120 : "=&b" (res), "=&b" (temp) | |
121 : "b" (value), "b" (add) | |
122 : "cc", "memory"); | |
123 | |
124 return res; | |
125 } | |
563 | 126 |
127 | |
128 #if (NGX_SMP) | |
129 #define ngx_memory_barrier() __asm__ volatile ("sync\n" ::: "memory") | |
130 #else | |
131 #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory") | |
132 #endif | |
611 | 133 |
935
db8e718447f1
use light-weight sync on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
934
diff
changeset
|
134 #endif |
db8e718447f1
use light-weight sync on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
934
diff
changeset
|
135 |
db8e718447f1
use light-weight sync on ppc64
Igor Sysoev <igor@sysoev.ru>
parents:
934
diff
changeset
|
136 |
611 | 137 #define ngx_cpu_pause() |