Mercurial > hg > nginx-quic
annotate src/os/unix/ngx_gcc_atomic_sparc64.h @ 8910:f3510cb959d1
Events: fixed EPOLLRDHUP with FIONREAD (ticket #2367).
When reading exactly rev->available bytes, rev->available might become 0
after FIONREAD usage introduction in efd71d49bde0. On the next call of
ngx_readv_chain() on systems with EPOLLRDHUP this resulted in return without
any actions, that is, with rev->ready set, and this in turn resulted in no
timers set in event pipe, leading to socket leaks.
Fix is to reset rev->ready in ngx_readv_chain() when returning due to
rev->available being 0 with EPOLLRDHUP, much like it is already done in
ngx_unix_recv(). This ensures that if rev->available will become 0, on
systems with EPOLLRDHUP support appropriate EPOLLRDHUP-specific handling
will happen on the next ngx_readv_chain() call.
While here, also synced ngx_readv_chain() to match ngx_unix_recv() and
reset rev->ready when returning due to rev->available being 0 with kqueue.
This is mostly cosmetic change, as rev->ready is anyway reset when
rev->available is set to 0.
author | Maxim Dounin <mdounin@mdounin.ru> |
---|---|
date | Fri, 15 Jul 2022 15:19:32 +0300 |
parents | 67653855682e |
children |
rev | line source |
---|---|
561 | 1 |
2 /* | |
3 * Copyright (C) Igor Sysoev | |
4412 | 4 * Copyright (C) Nginx, Inc. |
561 | 5 */ |
6 | |
7 | |
8 /* | |
9 * "casa [r1] 0x80, r2, r0" and | |
10 * "casxa [r1] 0x80, r2, r0" do the following: | |
11 * | |
12 * if ([r1] == r2) { | |
13 * swap(r0, [r1]); | |
14 * } else { | |
15 * r0 = [r1]; | |
16 * } | |
17 * | |
4572
67653855682e
Fixed spelling in multiline C comments.
Ruslan Ermilov <ru@nginx.com>
parents:
4412
diff
changeset
|
18 * so "r0 == r2" means that the operation was successful. |
561 | 19 * |
20 * | |
21 * The "r" means the general register. | |
22 * The "+r" means the general register used for both input and output. | |
23 */ | |
24 | |
25 | |
26 #if (NGX_PTR_SIZE == 4) | |
27 #define NGX_CASA "casa" | |
28 #else | |
29 #define NGX_CASA "casxa" | |
30 #endif | |
31 | |
32 | |
33 static ngx_inline ngx_atomic_uint_t | |
34 ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old, | |
35 ngx_atomic_uint_t set) | |
36 { | |
37 __asm__ volatile ( | |
38 | |
39 NGX_CASA " [%1] 0x80, %2, %0" | |
40 | |
41 : "+r" (set) : "r" (lock), "r" (old) : "memory"); | |
42 | |
43 return (set == old); | |
577 | 44 } |
561 | 45 |
46 | |
47 static ngx_inline ngx_atomic_int_t | |
48 ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add) | |
49 { | |
50 ngx_atomic_uint_t old, res; | |
51 | |
52 old = *value; | |
53 | |
54 for ( ;; ) { | |
55 | |
56 res = old + add; | |
57 | |
58 __asm__ volatile ( | |
59 | |
60 NGX_CASA " [%1] 0x80, %2, %0" | |
61 | |
62 : "+r" (res) : "r" (value), "r" (old) : "memory"); | |
63 | |
64 if (res == old) { | |
65 return res; | |
66 } | |
67 | |
68 old = res; | |
69 } | |
70 } | |
563 | 71 |
72 | |
73 #if (NGX_SMP) | |
74 #define ngx_memory_barrier() \ | |
75 __asm__ volatile ( \ | |
76 "membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad" \ | |
77 ::: "memory") | |
78 #else | |
79 #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory") | |
80 #endif | |
611 | 81 |
82 #define ngx_cpu_pause() |