Mercurial > hg > nginx-quic
view src/os/unix/ngx_gcc_atomic_sparc64.h @ 4448:539355d9e675 stable-1.0
Merge of r4404:
Fixed sched_setaffinity(2) to correctly pass size.
Second argument (cpusetsize) is size in bytes, not in bits. Previously
used constant 32 resulted in reading of uninitialized memory and caused
EINVAL to be returned on some Linux kernels.
author | Maxim Dounin <mdounin@mdounin.ru> |
---|---|
date | Sun, 05 Feb 2012 19:25:24 +0000 |
parents | 3f8a2132b93d |
children | d620f497c50f |
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/* * Copyright (C) Igor Sysoev */ /* * "casa [r1] 0x80, r2, r0" and * "casxa [r1] 0x80, r2, r0" do the following: * * if ([r1] == r2) { * swap(r0, [r1]); * } else { * r0 = [r1]; * } * * so "r0 == r2" means that the operation was successfull. * * * The "r" means the general register. * The "+r" means the general register used for both input and output. */ #if (NGX_PTR_SIZE == 4) #define NGX_CASA "casa" #else #define NGX_CASA "casxa" #endif static ngx_inline ngx_atomic_uint_t ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old, ngx_atomic_uint_t set) { __asm__ volatile ( NGX_CASA " [%1] 0x80, %2, %0" : "+r" (set) : "r" (lock), "r" (old) : "memory"); return (set == old); } static ngx_inline ngx_atomic_int_t ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add) { ngx_atomic_uint_t old, res; old = *value; for ( ;; ) { res = old + add; __asm__ volatile ( NGX_CASA " [%1] 0x80, %2, %0" : "+r" (res) : "r" (value), "r" (old) : "memory"); if (res == old) { return res; } old = res; } } #if (NGX_SMP) #define ngx_memory_barrier() \ __asm__ volatile ( \ "membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad" \ ::: "memory") #else #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory") #endif #define ngx_cpu_pause()