Mercurial > hg > nginx-quic
view src/os/unix/ngx_gcc_atomic_amd64.h @ 5970:74edc0ccf27a
Core: fixed a race resulting in extra sem_post()'s.
The mtx->wait counter was not decremented if we were able to obtain the lock
right after incrementing it. This resulted in unneeded sem_post() calls,
eventually leading to EOVERFLOW errors being logged, "sem_post() failed
while wake shmtx (75: Value too large for defined data type)".
To close the race, mtx->wait is now decremented if we obtain the lock right
after incrementing it in ngx_shmtx_lock(). The result can become -1 if a
concurrent ngx_shmtx_unlock() decrements mtx->wait before the added code does.
However, that only leads to one extra iteration in the next call of
ngx_shmtx_lock().
author | Roman Arutyunyan <arut@nginx.com> |
---|---|
date | Wed, 04 Feb 2015 16:22:43 +0300 |
parents | d620f497c50f |
children |
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/* * Copyright (C) Igor Sysoev * Copyright (C) Nginx, Inc. */ #if (NGX_SMP) #define NGX_SMP_LOCK "lock;" #else #define NGX_SMP_LOCK #endif /* * "cmpxchgq r, [m]": * * if (rax == [m]) { * zf = 1; * [m] = r; * } else { * zf = 0; * rax = [m]; * } * * * The "r" is any register, %rax (%r0) - %r16. * The "=a" and "a" are the %rax register. * Although we can return result in any register, we use "a" because it is * used in cmpxchgq anyway. The result is actually in %al but not in $rax, * however as the code is inlined gcc can test %al as well as %rax. * * The "cc" means that flags were changed. */ static ngx_inline ngx_atomic_uint_t ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old, ngx_atomic_uint_t set) { u_char res; __asm__ volatile ( NGX_SMP_LOCK " cmpxchgq %3, %1; " " sete %0; " : "=a" (res) : "m" (*lock), "a" (old), "r" (set) : "cc", "memory"); return res; } /* * "xaddq r, [m]": * * temp = [m]; * [m] += r; * r = temp; * * * The "+r" is any register, %rax (%r0) - %r16. * The "cc" means that flags were changed. */ static ngx_inline ngx_atomic_int_t ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add) { __asm__ volatile ( NGX_SMP_LOCK " xaddq %0, %1; " : "+r" (add) : "m" (*value) : "cc", "memory"); return add; } #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory") #define ngx_cpu_pause() __asm__ ("pause")