Mercurial > hg > nginx-quic
view src/os/unix/ngx_gcc_atomic_sparc64.h @ 8910:f3510cb959d1
Events: fixed EPOLLRDHUP with FIONREAD (ticket #2367).
When reading exactly rev->available bytes, rev->available might become 0
after FIONREAD usage introduction in efd71d49bde0. On the next call of
ngx_readv_chain() on systems with EPOLLRDHUP this resulted in return without
any actions, that is, with rev->ready set, and this in turn resulted in no
timers set in event pipe, leading to socket leaks.
Fix is to reset rev->ready in ngx_readv_chain() when returning due to
rev->available being 0 with EPOLLRDHUP, much like it is already done in
ngx_unix_recv(). This ensures that if rev->available will become 0, on
systems with EPOLLRDHUP support appropriate EPOLLRDHUP-specific handling
will happen on the next ngx_readv_chain() call.
While here, also synced ngx_readv_chain() to match ngx_unix_recv() and
reset rev->ready when returning due to rev->available being 0 with kqueue.
This is mostly cosmetic change, as rev->ready is anyway reset when
rev->available is set to 0.
author | Maxim Dounin <mdounin@mdounin.ru> |
---|---|
date | Fri, 15 Jul 2022 15:19:32 +0300 |
parents | 67653855682e |
children |
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/* * Copyright (C) Igor Sysoev * Copyright (C) Nginx, Inc. */ /* * "casa [r1] 0x80, r2, r0" and * "casxa [r1] 0x80, r2, r0" do the following: * * if ([r1] == r2) { * swap(r0, [r1]); * } else { * r0 = [r1]; * } * * so "r0 == r2" means that the operation was successful. * * * The "r" means the general register. * The "+r" means the general register used for both input and output. */ #if (NGX_PTR_SIZE == 4) #define NGX_CASA "casa" #else #define NGX_CASA "casxa" #endif static ngx_inline ngx_atomic_uint_t ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old, ngx_atomic_uint_t set) { __asm__ volatile ( NGX_CASA " [%1] 0x80, %2, %0" : "+r" (set) : "r" (lock), "r" (old) : "memory"); return (set == old); } static ngx_inline ngx_atomic_int_t ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add) { ngx_atomic_uint_t old, res; old = *value; for ( ;; ) { res = old + add; __asm__ volatile ( NGX_CASA " [%1] 0x80, %2, %0" : "+r" (res) : "r" (value), "r" (old) : "memory"); if (res == old) { return res; } old = res; } } #if (NGX_SMP) #define ngx_memory_barrier() \ __asm__ volatile ( \ "membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad" \ ::: "memory") #else #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory") #endif #define ngx_cpu_pause()