Mercurial > hg > nginx-vendor-0-6
view src/os/unix/ngx_gcc_atomic_amd64.h @ 340:10cc350ed8a1 NGINX_0_6_14
nginx 0.6.14
*) Change: now by default the "echo" SSI command uses entity encoding.
*) Feature: the "encoding" parameter in the "echo" SSI command.
*) Feature: the "access_log" directive may be used inside the
"limit_except" block.
*) Bugfix: if all upstream servers were failed, then all servers had
got weight the was equal one until servers became alive; bug
appeared in 0.6.6.
*) Bugfix: a segmentation fault occurred in worker process if
$date_local and $date_gmt were used outside the
ngx_http_ssi_filter_module.
*) Bugfix: a segmentation fault might occur in worker process if debug
log was enabled.
Thanks to Andrei Nigmatulin.
*) Bugfix: ngx_http_memcached_module did not set
$upstream_response_time.
Thanks to Maxim Dounin.
*) Bugfix: a worker process may got caught in an endless loop, if the
memcached was used.
*) Bugfix: nginx supported low case only "close" and "keep-alive"
values in the "Connection" request header line; bug appeared in
0.6.11.
*) Bugfix: sub_filter did not work with empty substitution.
*) Bugfix: in sub_filter parsing.
author | Igor Sysoev <http://sysoev.ru> |
---|---|
date | Mon, 15 Oct 2007 00:00:00 +0400 |
parents | 052a7b1d40e5 |
children |
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/* * Copyright (C) Igor Sysoev */ #if (NGX_SMP) #define NGX_SMP_LOCK "lock;" #else #define NGX_SMP_LOCK #endif /* * "cmpxchgq r, [m]": * * if (rax == [m]) { * zf = 1; * [m] = r; * } else { * zf = 0; * rax = [m]; * } * * * The "r" is any register, %rax (%r0) - %r16. * The "=a" and "a" are the %rax register. * Although we can return result in any register, we use "a" because it is * used in cmpxchgq anyway. The result is actually in %al but not in $rax, * however as the code is inlined gcc can test %al as well as %rax. * * The "cc" means that flags were changed. */ static ngx_inline ngx_atomic_uint_t ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old, ngx_atomic_uint_t set) { u_char res; __asm__ volatile ( NGX_SMP_LOCK " cmpxchgq %3, %1; " " sete %0; " : "=a" (res) : "m" (*lock), "a" (old), "r" (set) : "cc", "memory"); return res; } /* * "xaddq r, [m]": * * temp = [m]; * [m] += r; * r = temp; * * * The "+r" is any register, %rax (%r0) - %r16. * The "cc" means that flags were changed. */ static ngx_inline ngx_atomic_int_t ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add) { __asm__ volatile ( NGX_SMP_LOCK " xaddq %0, %1; " : "+r" (add) : "m" (*value) : "cc", "memory"); return add; } #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory") #define ngx_cpu_pause() __asm__ ("pause")