Mercurial > hg > nginx-vendor-0-7
view src/os/unix/ngx_gcc_atomic_ppc.h @ 196:8759b346e431 NGINX_0_3_45
nginx 0.3.45
*) Feature: the "ssl_verify_client", "ssl_verify_depth", and
"ssl_client_certificate" directives.
*) Change: the $request_method variable now returns the main request
method.
*) Change: the ° symbol codes were changed in koi-win conversion
table.
*) Feature: the euro É N symbols were added to koi-win conversion table.
*) Bugfix: if nginx distributed the requests among several backends and
some backend failed, then requests intended for this backend was
directed to one live backend only instead of being distributed among
the rest.
author | Igor Sysoev <http://sysoev.ru> |
---|---|
date | Sat, 06 May 2006 00:00:00 +0400 |
parents | 73e8476f9142 |
children | 6eb1e38f0f1f |
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/* * Copyright (C) Igor Sysoev */ /* * The ppc assembler treats ";" as comment, so we have to use "\n". * The minus in "bne-" is a hint for the branch prediction unit that * this branch is unlikely to be taken. * The "1b" means the nearest backward label "1" and the "1f" means * the nearest forward label "1". * * The "b" means that the base registers can be used only, i.e. * any register except r0. The r0 register always has a zero value and * could not be used in "addi r0, r0, 1". * The "=&b" means that no input registers can be used. */ static ngx_inline ngx_atomic_uint_t ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old, ngx_atomic_uint_t set) { ngx_atomic_uint_t res, temp; __asm__ volatile ( " li %0, 0 \n" /* preset "0" to "res" */ " lwarx %1, 0, %2 \n" /* load from [lock] into "temp" */ /* and store reservation */ " cmpw %1, %3 \n" /* compare "temp" and "old" */ " bne- 1f \n" /* not equal */ " stwcx. %4, 0, %2 \n" /* store "set" into [lock] if reservation */ /* is not cleared */ " bne- 1f \n" /* the reservation was cleared */ " li %0, 1 \n" /* set "1" to "res" */ "1: \n" : "=&b" (res), "=&b" (temp) : "b" (lock), "b" (old), "b" (set) : "cc", "memory"); return res; } static ngx_inline ngx_atomic_int_t ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add) { ngx_atomic_uint_t res, temp; __asm__ volatile ( "1: lwarx %0, 0, %2 \n" /* load from [value] into "res" */ /* and store reservation */ " add %1, %0, %3 \n" /* "res" + "add" store in "temp" */ " stwcx. %1, 0, %2 \n" /* store "temp" into [value] if reservation */ /* is not cleared */ " bne- 1b \n" /* try again if reservation was cleared */ : "=&b" (res), "=&b" (temp) : "b" (value), "b" (add) : "cc", "memory"); return res; } #if (NGX_SMP) #define ngx_memory_barrier() __asm__ volatile ("sync\n" ::: "memory") #else #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory") #endif #define ngx_cpu_pause()