Mercurial > hg > nginx-vendor-0-8
view src/core/ngx_cpuinfo.c @ 366:babd3d9efb62 NGINX_0_6_27
nginx 0.6.27
*) Change: now by default the rtsig method is not built on
Linux 2.6.18+.
*) Change: now a request method is not changed while redirection to a
named location via an "error_page" directive.
*) Feature: the "resolver" and "resolver_timeout" directives in SMTP
proxy.
*) Feature: the "post_action" directive supports named locations.
*) Bugfix: a segmentation fault occurred in worker process, if a
request was redirected from proxy, FastCGI, or memcached location to
static named locations.
*) Bugfix: browsers did not repeat SSL handshake if there is no valid
client certificate in first handshake.
Thanks to Alexander V. Inyukhin.
*) Bugfix: if response code 495-497 was redirected via an "error_page"
directive without code change, then nginx tried to allocate too many
memory.
*) Bugfix: memory leak in long-lived non buffered connections.
*) Bugfix: memory leak in resolver.
*) Bugfix: a segmentation fault occurred in worker process, if a
request was redirected from proxy, FastCGI, or memcached location to
static named locations.
*) Bugfix: in the $proxy_host and $proxy_port variables caching.
Thanks to Sergey Bochenkov.
*) Bugfix: a "proxy_pass" directive with variables used incorrectly the
same port as in another "proxy_pass" directive with the same host
name and without variables.
Thanks to Sergey Bochenkov.
*) Bugfix: an alert "sendmsg() failed (9: Bad file descriptor)" on some
64-bit platforms while reconfiguration.
*) Bugfix: a segmentation fault occurred in worker process, if empty
stub block was used second time in SSI.
*) Bugfix: in copying URI part contained escaped symbols into arguments.
author | Igor Sysoev <http://sysoev.ru> |
---|---|
date | Wed, 12 Mar 2008 00:00:00 +0300 |
parents | a39aab45a53f |
children | 56baf312c1b5 |
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/* * Copyright (C) Igor Sysoev */ #include <ngx_config.h> #include <ngx_core.h> #if (( __i386__ || __amd64__ ) && ( __GNUC__ || __INTEL_COMPILER )) static ngx_inline void ngx_cpuid(uint32_t i, uint32_t *buf); #if ( __i386__ ) static ngx_inline void ngx_cpuid(uint32_t i, uint32_t *buf) { /* * we could not use %ebx as output parameter if gcc builds PIC, * and we could not save %ebx on stack, because %esp is used, * when the -fomit-frame-pointer optimization is specified. */ __asm__ ( " mov %%ebx, %%esi; " " cpuid; " " mov %%eax, (%1); " " mov %%ebx, 4(%1); " " mov %%edx, 8(%1); " " mov %%ecx, 12(%1); " " mov %%esi, %%ebx; " : : "a" (i), "D" (buf) : "ecx", "edx", "esi", "memory" ); } #else /* __amd64__ */ static ngx_inline void ngx_cpuid(uint32_t i, uint32_t *buf) { uint32_t eax, ebx, ecx, edx; __asm__ ( "cpuid" : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) : "a" (i) ); buf[0] = eax; buf[1] = ebx; buf[2] = edx; buf[3] = ecx; } #endif /* auto detect the L2 cache line size of modern and widespread CPUs */ void ngx_cpuinfo(void) { u_char *vendor; uint32_t vbuf[5], cpu[4]; vbuf[0] = 0; vbuf[1] = 0; vbuf[2] = 0; vbuf[3] = 0; vbuf[4] = 0; ngx_cpuid(0, vbuf); vendor = (u_char *) &vbuf[1]; if (vbuf[0] == 0) { return; } ngx_cpuid(1, cpu); if (ngx_strcmp(vendor, "GenuineIntel") == 0) { switch ((cpu[0] & 0xf00) >> 8) { /* Pentium */ case 5: ngx_cacheline_size = 32; break; /* Pentium Pro, II, III */ case 6: ngx_cacheline_size = 32; if ((cpu[0] & 0xf0) >= 0xd0) { /* Intel Core */ ngx_cacheline_size = 64; } break; /* * Pentium 4, although its cache line size is 64 bytes, * it prefetches up to two cache lines during memory read */ case 15: ngx_cacheline_size = 128; break; } } else if (ngx_strcmp(vendor, "AuthenticAMD") == 0) { ngx_cacheline_size = 64; } } #else void ngx_cpuinfo(void) { } #endif