Mercurial > hg > nginx-vendor-1-0
comparison src/os/unix/ngx_gcc_atomic_amd64.h @ 274:052a7b1d40e5 NGINX_0_5_7
nginx 0.5.7
*) Feature: the ssl_session_cache storage optimization.
*) Bugfixes in the "ssl_session_cache" and "limit_zone" directives.
*) Bugfix: the segmentation fault was occurred on start or while
reconfiguration if the "ssl_session_cache" or "limit_zone"
directives were used on 64-bit platforms.
*) Bugfix: a segmentation fault occurred if the "add_before_body" or
"add_after_body" directives were used and there was no
"Content-Type" header line in response.
*) Bugfix: the OpenSSL library was always built with the threads
support.
Thanks to Den Ivanov.
*) Bugfix: the PCRE-6.5+ library and the icc compiler compatibility.
author | Igor Sysoev <http://sysoev.ru> |
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date | Mon, 15 Jan 2007 00:00:00 +0300 |
parents | 73e8476f9142 |
children | ad25218fd14b |
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273:60df8db42ffb | 274:052a7b1d40e5 |
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22 * rax = [m]; | 22 * rax = [m]; |
23 * } | 23 * } |
24 * | 24 * |
25 * | 25 * |
26 * The "r" is any register, %rax (%r0) - %r16. | 26 * The "r" is any register, %rax (%r0) - %r16. |
27 * The "=a" and "a" are the %rax register. Although we can return result | 27 * The "=a" and "a" are the %rax register. |
28 * in any register, we use %rax because it is used in cmpxchgq anyway. | 28 * Although we can return result in any register, we use "a" because it is |
29 * used in cmpxchgq anyway. The result is actually in %al but not in $rax, | |
30 * however as the code is inlined gcc can test %al as well as %rax. | |
31 * | |
29 * The "cc" means that flags were changed. | 32 * The "cc" means that flags were changed. |
30 */ | 33 */ |
31 | 34 |
32 static ngx_inline ngx_atomic_uint_t | 35 static ngx_inline ngx_atomic_uint_t |
33 ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old, | 36 ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old, |
34 ngx_atomic_uint_t set) | 37 ngx_atomic_uint_t set) |
35 { | 38 { |
36 ngx_atomic_uint_t res; | 39 u_char res; |
37 | 40 |
38 __asm__ volatile ( | 41 __asm__ volatile ( |
39 | 42 |
40 NGX_SMP_LOCK | 43 NGX_SMP_LOCK |
41 " cmpxchgq %3, %1; " | 44 " cmpxchgq %3, %1; " |
42 " setz %b0; " | 45 " sete %0; " |
43 " movzbq %b0, %0; " | |
44 | 46 |
45 : "=a" (res) : "m" (*lock), "a" (old), "r" (set) : "cc", "memory"); | 47 : "=a" (res) : "m" (*lock), "a" (old), "r" (set) : "cc", "memory"); |
46 | 48 |
47 return res; | 49 return res; |
48 } | 50 } |
66 __asm__ volatile ( | 68 __asm__ volatile ( |
67 | 69 |
68 NGX_SMP_LOCK | 70 NGX_SMP_LOCK |
69 " xaddq %0, %1; " | 71 " xaddq %0, %1; " |
70 | 72 |
71 : "+q" (add) : "m" (*value) : "cc", "memory"); | 73 : "+r" (add) : "m" (*value) : "cc", "memory"); |
72 | 74 |
73 return add; | 75 return add; |
74 } | 76 } |
75 | 77 |
76 | 78 |