Mercurial > hg > nginx-vendor-1-0
view src/os/unix/ngx_gcc_atomic_amd64.h @ 622:8dc007eddbcf NGINX_1_0_1
nginx 1.0.1
*) Change: now the "split_clients" directive uses MurmurHash2 algorithm
because of better distribution.
Thanks to Oleg Mamontov.
*) Change: now long strings starting with zero are not considered as
false values.
Thanks to Maxim Dounin.
*) Change: now nginx uses a default listen backlog value 511 on Linux.
*) Feature: the $upstream_... variables may be used in the SSI and perl
modules.
*) Bugfix: now nginx limits better disk cache size.
Thanks to Oleg Mamontov.
*) Bugfix: a segmentation fault might occur while parsing incorrect
IPv4 address; the bug had appeared in 0.9.3.
Thanks to Maxim Dounin.
*) Bugfix: nginx could not be built by gcc 4.6 without --with-debug
option.
*) Bugfix: nginx could not be built on Solaris 9 and earlier; the bug
had appeared in 0.9.3.
Thanks to Dagobert Michelsen.
*) Bugfix: $request_time variable had invalid values if subrequests
were used; the bug had appeared in 0.8.47.
Thanks to Igor A. Valcov.
author | Igor Sysoev <http://sysoev.ru> |
---|---|
date | Tue, 03 May 2011 00:00:00 +0400 |
parents | 052a7b1d40e5 |
children | ad25218fd14b |
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/* * Copyright (C) Igor Sysoev */ #if (NGX_SMP) #define NGX_SMP_LOCK "lock;" #else #define NGX_SMP_LOCK #endif /* * "cmpxchgq r, [m]": * * if (rax == [m]) { * zf = 1; * [m] = r; * } else { * zf = 0; * rax = [m]; * } * * * The "r" is any register, %rax (%r0) - %r16. * The "=a" and "a" are the %rax register. * Although we can return result in any register, we use "a" because it is * used in cmpxchgq anyway. The result is actually in %al but not in $rax, * however as the code is inlined gcc can test %al as well as %rax. * * The "cc" means that flags were changed. */ static ngx_inline ngx_atomic_uint_t ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old, ngx_atomic_uint_t set) { u_char res; __asm__ volatile ( NGX_SMP_LOCK " cmpxchgq %3, %1; " " sete %0; " : "=a" (res) : "m" (*lock), "a" (old), "r" (set) : "cc", "memory"); return res; } /* * "xaddq r, [m]": * * temp = [m]; * [m] += r; * r = temp; * * * The "+r" is any register, %rax (%r0) - %r16. * The "cc" means that flags were changed. */ static ngx_inline ngx_atomic_int_t ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add) { __asm__ volatile ( NGX_SMP_LOCK " xaddq %0, %1; " : "+r" (add) : "m" (*value) : "cc", "memory"); return add; } #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory") #define ngx_cpu_pause() __asm__ ("pause")