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comparison src/os/unix/ngx_gcc_atomic_ppc.h @ 934:4745e72044fb

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fix atomic operations on ppc64
author Igor Sysoev <igor@sysoev.ru>
date Tue, 19 Dec 2006 13:41:03 +0000
parents 3f8a2132b93d
children db8e718447f1
comparison
equal deleted inserted replaced
933:1ce231663322 934:4745e72044fb
14 * The "b" means that the base registers can be used only, i.e. 14 * The "b" means that the base registers can be used only, i.e.
15 * any register except r0. The r0 register always has a zero value and 15 * any register except r0. The r0 register always has a zero value and
16 * could not be used in "addi r0, r0, 1". 16 * could not be used in "addi r0, r0, 1".
17 * The "=&b" means that no input registers can be used. 17 * The "=&b" means that no input registers can be used.
18 */ 18 */
19
20 #if (NGX_PTR_SIZE == 8)
21
22 static ngx_inline ngx_atomic_uint_t
23 ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old,
24 ngx_atomic_uint_t set)
25 {
26 ngx_atomic_uint_t res, temp;
27
28 __asm__ volatile (
29
30 " li %0, 0 \n" /* preset "0" to "res" */
31 " ldarx %1, 0, %2 \n" /* load from [lock] into "temp" */
32 /* and store reservation */
33 " cmpd %1, %3 \n" /* compare "temp" and "old" */
34 " bne- 1f \n" /* not equal */
35 " stdcx. %4, 0, %2 \n" /* store "set" into [lock] if reservation */
36 /* is not cleared */
37 " bne- 1f \n" /* the reservation was cleared */
38 " li %0, 1 \n" /* set "1" to "res" */
39 "1: \n"
40
41 : "=&b" (res), "=&b" (temp)
42 : "b" (lock), "b" (old), "b" (set)
43 : "cc", "memory");
44
45 return res;
46 }
47
48
49 static ngx_inline ngx_atomic_int_t
50 ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add)
51 {
52 ngx_atomic_uint_t res, temp;
53
54 __asm__ volatile (
55
56 "1: ldarx %0, 0, %2 \n" /* load from [value] into "res" */
57 /* and store reservation */
58 " add %1, %0, %3 \n" /* "res" + "add" store in "temp" */
59 " stdcx. %1, 0, %2 \n" /* store "temp" into [value] if reservation */
60 /* is not cleared */
61 " bne- 1b \n" /* try again if reservation was cleared */
62
63 : "=&b" (res), "=&b" (temp)
64 : "b" (value), "b" (add)
65 : "cc", "memory");
66
67 return res;
68 }
69
70 #else
19 71
20 static ngx_inline ngx_atomic_uint_t 72 static ngx_inline ngx_atomic_uint_t
21 ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old, 73 ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old,
22 ngx_atomic_uint_t set) 74 ngx_atomic_uint_t set)
23 { 75 {
63 : "cc", "memory"); 115 : "cc", "memory");
64 116
65 return res; 117 return res;
66 } 118 }
67 119
120 #endif
121
68 122
69 #if (NGX_SMP) 123 #if (NGX_SMP)
70 #define ngx_memory_barrier() __asm__ volatile ("sync\n" ::: "memory") 124 #define ngx_memory_barrier() __asm__ volatile ("sync\n" ::: "memory")
71 #else 125 #else
72 #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory") 126 #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory")