Mercurial > hg > nginx
view src/os/unix/ngx_gcc_atomic_sparc64.h @ 8795:278ab0ed24f2 quic
HTTP/3: generate more H3_FRAME_UNEXPECTED.
As per quic-http-34, these are the cases when this error should be generated:
If an endpoint receives a second SETTINGS frame
on the control stream, the endpoint MUST respond with a connection
error of type H3_FRAME_UNEXPECTED
SETTINGS frames MUST NOT be sent on any stream other than the control
stream. If an endpoint receives a SETTINGS frame on a different
stream, the endpoint MUST respond with a connection error of type
H3_FRAME_UNEXPECTED.
A client MUST NOT send a PUSH_PROMISE frame. A server MUST treat the
receipt of a PUSH_PROMISE frame as a connection error of type
H3_FRAME_UNEXPECTED; see Section 8.
The MAX_PUSH_ID frame is always sent on the control stream. Receipt
of a MAX_PUSH_ID frame on any other stream MUST be treated as a
connection error of type H3_FRAME_UNEXPECTED.
Receipt of an invalid sequence of frames MUST be treated as a
connection error of type H3_FRAME_UNEXPECTED; see Section 8. In
particular, a DATA frame before any HEADERS frame, or a HEADERS or
DATA frame after the trailing HEADERS frame, is considered invalid.
A CANCEL_PUSH frame is sent on the control stream. Receiving a
CANCEL_PUSH frame on a stream other than the control stream MUST be
treated as a connection error of type H3_FRAME_UNEXPECTED.
The GOAWAY frame is always sent on the control stream.
author | Roman Arutyunyan <arut@nginx.com> |
---|---|
date | Fri, 11 Jun 2021 12:11:08 +0300 |
parents | 67653855682e |
children |
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/* * Copyright (C) Igor Sysoev * Copyright (C) Nginx, Inc. */ /* * "casa [r1] 0x80, r2, r0" and * "casxa [r1] 0x80, r2, r0" do the following: * * if ([r1] == r2) { * swap(r0, [r1]); * } else { * r0 = [r1]; * } * * so "r0 == r2" means that the operation was successful. * * * The "r" means the general register. * The "+r" means the general register used for both input and output. */ #if (NGX_PTR_SIZE == 4) #define NGX_CASA "casa" #else #define NGX_CASA "casxa" #endif static ngx_inline ngx_atomic_uint_t ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old, ngx_atomic_uint_t set) { __asm__ volatile ( NGX_CASA " [%1] 0x80, %2, %0" : "+r" (set) : "r" (lock), "r" (old) : "memory"); return (set == old); } static ngx_inline ngx_atomic_int_t ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add) { ngx_atomic_uint_t old, res; old = *value; for ( ;; ) { res = old + add; __asm__ volatile ( NGX_CASA " [%1] 0x80, %2, %0" : "+r" (res) : "r" (value), "r" (old) : "memory"); if (res == old) { return res; } old = res; } } #if (NGX_SMP) #define ngx_memory_barrier() \ __asm__ volatile ( \ "membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad" \ ::: "memory") #else #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory") #endif #define ngx_cpu_pause()