# HG changeset patch
# User Igor Sysoev <igor@sysoev.ru>
# Date 1201590378 0
# Node ID 8e88522cb6da41b54ce7903b2e07b8f1cd8de480
# Parent  9afb84c7cc61f555901303750c026bac0767ebdb
detect L2 cache line size for Intel Core

diff --git a/src/core/ngx_cpuinfo.c b/src/core/ngx_cpuinfo.c
--- a/src/core/ngx_cpuinfo.c
+++ b/src/core/ngx_cpuinfo.c
@@ -96,9 +96,18 @@ ngx_cpuinfo(void)
 
         /* Pentium */
         case 5:
+            ngx_cacheline_size = 32;
+            break;
+
         /* Pentium Pro, II, III */
         case 6:
             ngx_cacheline_size = 32;
+
+            if ((cpu[0] & 0xf0) >= 0xd0) {
+                /* Intel Core */
+                ngx_cacheline_size = 64;
+            }
+
             break;
 
         /*