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110
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1
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2 /*
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3 * Copyright (C) Igor Sysoev
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4 */
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5
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6
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7 /*
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8 * The ppc assembler treats ";" as comment, so we have to use "\n".
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9 * The minus in "bne-" is a hint for the branch prediction unit that
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10 * this branch is unlikely to be taken.
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11 * The "1b" means the nearest backward label "1" and the "1f" means
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12 * the nearest forward label "1".
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13 *
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14 * The "b" means that the base registers can be used only, i.e.
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15 * any register except r0. The r0 register always has a zero value and
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16 * could not be used in "addi r0, r0, 1".
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17 * The "=&b" means that no input registers can be used.
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18 */
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19
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20 static ngx_inline ngx_atomic_uint_t
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21 ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old,
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22 ngx_atomic_uint_t set)
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23 {
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24 ngx_atomic_uint_t res, temp;
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25
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26 __asm__ volatile (
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27
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28 " li %0, 0 \n" /* preset "0" to "res" */
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29 " lwarx %1, 0, %2 \n" /* load from [lock] into "temp" */
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30 /* and store reservation */
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31 " cmpw %1, %3 \n" /* compare "temp" and "old" */
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32 " bne- 1f \n" /* not equal */
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33 " stwcx. %4, 0, %2 \n" /* store "set" into [lock] if reservation */
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34 /* is not cleared */
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35 " bne- 1f \n" /* the reservation was cleared */
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36 " li %0, 1 \n" /* set "1" to "res" */
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37 "1: \n"
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38
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39 : "=&b" (res), "=&b" (temp)
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40 : "b" (lock), "b" (old), "b" (set)
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41 : "cc", "memory");
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42
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43 return res;
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44 }
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45
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46
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47 static ngx_inline ngx_atomic_int_t
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48 ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add)
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49 {
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50 ngx_atomic_uint_t res, temp;
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51
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52 __asm__ volatile (
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53
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54 "1: lwarx %0, 0, %2 \n" /* load from [value] into "res" */
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55 /* and store reservation */
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56 " add %1, %0, %3 \n" /* "res" + "add" store in "temp" */
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57 " stwcx. %1, 0, %2 \n" /* store "temp" into [value] if reservation */
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58 /* is not cleared */
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59 " bne- 1b \n" /* try again if reservation was cleared */
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60
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61 : "=&b" (res), "=&b" (temp)
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62 : "b" (value), "b" (add)
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63 : "cc", "memory");
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64
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65 return res;
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66 }
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