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1
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2 /*
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3 * Copyright (C) Igor Sysoev
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660
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4 * Copyright (C) Nginx, Inc.
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110
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5 */
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6
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7
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8 /*
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9 * "casa [r1] 0x80, r2, r0" and
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10 * "casxa [r1] 0x80, r2, r0" do the following:
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11 *
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12 * if ([r1] == r2) {
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13 * swap(r0, [r1]);
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14 * } else {
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15 * r0 = [r1];
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16 * }
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17 *
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18 * so "r0 == r2" means that the operation was successfull.
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19 *
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20 *
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21 * The "r" means the general register.
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22 * The "+r" means the general register used for both input and output.
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23 */
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24
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25
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26 #if (NGX_PTR_SIZE == 4)
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27 #define NGX_CASA "casa"
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28 #else
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29 #define NGX_CASA "casxa"
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30 #endif
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31
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32
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33 static ngx_inline ngx_atomic_uint_t
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34 ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old,
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35 ngx_atomic_uint_t set)
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36 {
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37 __asm__ volatile (
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38
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39 NGX_CASA " [%1] 0x80, %2, %0"
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40
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41 : "+r" (set) : "r" (lock), "r" (old) : "memory");
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42
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43 return (set == old);
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126
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44 }
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110
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45
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46
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47 static ngx_inline ngx_atomic_int_t
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48 ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add)
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49 {
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50 ngx_atomic_uint_t old, res;
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51
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52 old = *value;
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53
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54 for ( ;; ) {
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55
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56 res = old + add;
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57
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58 __asm__ volatile (
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59
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60 NGX_CASA " [%1] 0x80, %2, %0"
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61
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62 : "+r" (res) : "r" (value), "r" (old) : "memory");
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63
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64 if (res == old) {
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65 return res;
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66 }
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67
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68 old = res;
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69 }
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70 }
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112
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71
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72
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73 #if (NGX_SMP)
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74 #define ngx_memory_barrier() \
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75 __asm__ volatile ( \
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76 "membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad" \
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77 ::: "memory")
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78 #else
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79 #define ngx_memory_barrier() __asm__ volatile ("" ::: "memory")
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80 #endif
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160
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81
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82 #define ngx_cpu_pause()
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